The transfer of system know-how as the interface between the user of application specific ICs (ASICs) and the vendor has not yet been clearly delineated. Many circuits most satisfactorily executed on an integrated basis will as a result have to remain on a discrete basis. The following paper describes by means of an actual example taken from execution of a gate-array for suppliers of the merchant marine. The sequence of an ASIC design, beginning with the definition of the problem and ending with delivery of the IC prototypes. Discussion is provided of both the economic standpoints leading to decision for a gate-array solution. As well as of the engineering prerequisites involved. Elaboration is also provided of the modifications necessary in the breadboard design before the final version is accepted. A few of the salient points treated here are hierarchical design, and test philosophy.


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    Title :

    Gate array design for a protective circuit employed in the merchant marine


    Additional title:

    Gate-Array-Entwurf fuer eine in der Handelsmarine verwendete Schutzschaltung


    Contributors:
    Ludwig, P. (author) / Sonntag, M. (author)


    Publication date :

    1985


    Size :

    5 Seiten, 4 Bilder


    Type of media :

    Conference paper


    Type of material :

    Print


    Language :

    English