Interface issues in hardware-in-the-loop simulation

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Interface issues in hardware-in-the-loop simulation

Interface issues in hardware-in-the-loop simulation

Monti, A. / Figueroa, H. / Lentijo, S. / Wu, X. / Dougal, R.

This paper discusses the interface issues in hardware-in-the-loop (HIL) simulations. Different interfacing schemes are introduced to extend the applicability of HIL to power electronics applications that contains switching events and power hardware testing. Application examples are used to demonstrate the effectiveness of these interfaces, and HIL simulation results are presented.

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Title :

Interface issues in hardware-in-the-loop simulation

Contributors:

Monti, A. (author) / Figueroa, H. (author) / Lentijo, S. (author) / Wu, X. (author) / Dougal, R. (author)

Published in:

IEEE Electric Ship Technologies Symposium, 2005. ; 39-45

Publication date :

2005-01-01

Size :

1100078 byte

ISBN :

DOI :

https://doi.org/10.1109/ESTS.2005.1524650

Type of media :

Conference paper

Type of material :

Electronic Resource

Language :

English

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