Re-programmable SEU immune rad-hard FPGA test and burn-in strategy
Re-programmable SEU immune rad-hard FPGA test and burn-in strategy
- New search for: Vrignaud, J.M.
- New search for: Guerre, F.X.
- New search for: Vrignaud, J.M.
- New search for: Guerre, F.X.
Starting from the existing ATMEL AT40K40AL SRAM based FPGA, ATMEL Nantes have developed a SEU hardened version to address the Space oriented applications market. After describing the architecture of the circuit, the authors will talk about the way of testing and the burn-in strategy. Finally, the authors will describe the procedure used for evaluating the SEU sensitivity of the circuit. The test flow used to test the AT40K40EL comes from the test suite developed by ATMEL Corp. Combining dynamic measurements with functional tests based on suitable configuration improves significantly the global test coverage. These additional measurements have been created by using a Macro Generator Language developed by ATMEL. The burn-in of a programmable device is much more difficult than a standard device. Specific hardware must be used to configure the FPGA before burning the chips. This burn-in operation is performed in programmable AEHR ovens, which allow to configure and monitor 18 parts in the same time. The SEU evaluation, which is a major feature of this AT40K40EL, has been defined with the agreement of ESA and CNES. The strategy used is described later in this paper .
Document information
Re-programmable SEU immune rad-hard FPGA test and burn-in strategy
Prüf- und Burn-in-Strategie für umprogrammierbare SEU-immune strahlungsfeste FPGA
2002
10 Seiten, 6 Bilder
Conference paper
English
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