Design, Simulation and Development Testing of the Space and Shuttle Data Bus System
Design, Simulation and Development Testing of the Space and Shuttle Data Bus System
- New search for: A. J. Shapiro
- New search for: A. J. Shapiro
The result of current LSI and future VHSIC component technology is to develop avionics of greater information throughput capability operating at higher frequencies yet achieving tenfold packaging densities. The aircraft or spacecraft designer faced with demands to add more mission and/or functional capability capitalizes on the above mentioned trend by adding more avionics to the vehicle thereby increasing the demand on the DBS to provide a high integrity interconnect with no degradation to the intrinsic avionic capability. The Space Shuttle Orbiter having 5 to I0 Processors (computers) and over 400 elements of avionics dedicated to interfacing via 24 interconnecting data buses is an example of this trend. This paper describes a suggested sequence to be followed in the design, development, analysis and simulation of a digital DBS. It discusses the computer modeling/simulations performed and the hardware verification test results obtained on elements of the Space Shuttle Orbiter data bus.
Document information
Design, Simulation and Development Testing of the Space and Shuttle Data Bus System
1984
22 pages
Report
No indication
English
Astronautics , Manned Spacecraft , Space technology , Space shuttles , Avionics , Time division multiplexing , Space systems , Digital simulation , Computer aided design , Integrated circuits , Space missions , Component Reports , NATO furnished , Digital avionics , Space shuttle orbiter , Data bus systems
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