Programming and development environments for configurable computing systems

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Programming and development environments for configurable computing systems

Kumar, S. / Bhatt, D. / Vestal, S. / Wren, B. / Shackleton, J. / Shirley, H. / Bhatt, R. / Golusky, J. / Vojta, M. / Nanavati, C. / ... [more]

Abstract

Heterogeneous configurable computing systems containing general-purpose processors, special-purpose processors, field-programmable gate arrays (FPGAs), and application-specific integrated circuits (ASICs) present several programming and development challenges. The ADAPTERS effort is addressing these challenges by focusing on three technology areas: (1) a unified data flow programming environment, (2) hardware/software partitioning and mapping tool, along with a system level modeling tool, and (3) a dynamic reconfiguration run-time environment for FPGAs. To investigate automatic mapping techniques, a constant false alarm rate (CFAR) application has been implemented on a combined PC/WILDFORCE platform. The combined platform containing FPGAs provided a 20% improvement in the end-to-end latency compared to a software solution running on a PC. An image compression example has also been developed to explore mode-based dynamic FPGA reconfiguration. The dynamic reconfiguration technology being developed can be used to adapt the behavior of systems, such as satellites, to changing internal and external conditions.

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Document information

Title :

Programming and development environments for configurable computing systems

Contributors:

Kumar, S. (author) / Bhatt, D. (author) / Vestal, S. (author) / Wren, B. (author) / Shackleton, J. (author) / Shirley, H. (author) / Bhatt, R. (author) / Golusky, J. (author) / Vojta, M. (author) / Nanavati, C. (author)

Published in:

2000 IEEE Aerospace Conference. Proceedings (Cat. No.00TH8484) ; 5 ; 487-497 vol.5

Publication date :

2000-01-01

Size :

2054931 byte

ISBN :

0-7803-5846-5

ISSN :

1095-323X

DOI :

https://doi.org/10.1109/AERO.2000.878524