DMAC: Deadline-Miss-Aware Control (Artifact)

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DMAC: Deadline-Miss-Aware Control (Artifact)

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Pazzaglia, Paolo / Mandrioli, Claudio / Maggio, Martina / Cervin, Anton

The real-time implementation of periodic controllers requires solving a co-design problem, in which the choice of the controller sampling period is a crucial element. Classic design techniques limit the period exploration to safe values, that guarantee the correct execution of the controller alongside the remaining real-time load, i.e., ensuring that the controller worst-case response time does not exceed its deadline. This paper presents the artifact linked to DMAC: the first formally-grounded controller design strategy that explores shorter periods, thus explicitly taking into account the possibility of missing deadlines. The experimental results obtained with this artifact show that the DMAC design proposal - i.e., exploring the space where deadlines can be missed and handled with different strategies - greatly outperforms classical control design techniques.

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Title :

DMAC: Deadline-Miss-Aware Control (Artifact)

Contributors:

Pazzaglia, Paolo (author) / Mandrioli, Claudio (author) / Maggio, Martina (author) / Cervin, Anton (author) / https://dx.doi.org/10.4230/LIPIcs.ECRTS.2019.1

Publication date :

2019-01-01

DOI :

https://doi.org/10.4230/DARTS.5.1.3

Type of media :

Conference paper

Type of material :

Electronic Resource

Language :

English

Keywords :

Weakly-Hard Real-Time Systems , Deadline Miss Handling , Control Design , Data processing Computer science