This article deals with performance verifications applied to architecture models of real-time embedded systems. We focus on models that can be verified with the real-time scheduling theory. To perform verifications with the real-time scheduling theory, the architecture designers must check that their models are compliant with the assumptions of this theory. Unfortunately, this task is difficult since it requires that designers have a deep understanding of the real-time scheduling theory. In this article, we investigate how to help designers to check that their architecture models are compliant with this theory. We show how to explicitly model the relationships between an architectural model and real-time scheduling analysis methods. From these models, we apply a model-based engineering process to generate a recognition tool that is able to detect from an architecture model which are the analysis methods that can be applied.


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    Titel :

    AADL Real-Tme Design-Pattern Automatic Recognition


    Weitere Titelangaben:

    Sae Technical Papers


    Beteiligte:
    Plantec, Alain (Autor:in) / Legrand, Jerome (Autor:in) / Dissaux, Pierre (Autor:in) / Rubini, Stephane (Autor:in) / Gaudel, Vincent (Autor:in)

    Kongress:

    Aerospace Technology Conference and Exposition ; 2011



    Erscheinungsdatum :

    2011-10-18




    Medientyp :

    Aufsatz (Konferenz)


    Format :

    Print


    Sprache :

    Englisch







    AADL and Aerospace

    S. Miller / P. Feiler / M. Hecht | NTIS | 2021