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Softwareentwicklung
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Verification of Solid State Interlocking Programs
Verification of Scheme Plans Using CSP||B
Validation of Railway Interlocking Systems by Formal Verification, A Case Study
Validation and Test of Complex Weapons Systems
Twenty-Five Years of Formal Methods and Railways: What Next?
Towards Verification of Model Transformations Via Goal-Directed Certification
Towards Model-Driven Development of Hard Real-Time Systems: Integrating ASCET and aiT/StackAnalyzer