A multiple chip magnetic bubble memory cell design developed for NASA embodies the low power, low weight, environmental tolerance and reliability necessary for successful operation in spacecraft launch and mission environments. Packaging of multiple chips in a common magnetic bias, drive coil assembly reduces weight and volume overhead per chip and also reduces the number of coil drive components required. This 8 x 105 bit cell is conduction cooled and provides a metal and ceramic sealed hermetic chip environment.
An 8x105 bit bubble memory cell for spacecraft applications
Ein 8 x 10<sup>5</sup> Bit Bubblechip fuer den Einsatz in der Raumfahrt
IEEE Transactions on Magnetics ; 16 , 5 ; 770-772
1980
3 Seiten, 9 Bilder, 1 Tabelle, 3 Quellen
Aufsatz (Zeitschrift)
Englisch
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