Overhead Reduction in Data-Flow Software-Based Fault Tolerance Techniques

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Overhead Reduction in Data-Flow Software-Based Fault Tolerance Techniques

Chielle, Eduardo / Kastensmidt, Fernanda Lima / Cuenca-Asensi, Sergio

There is an increasing interest in aerospace industry to increment the flexibility of the systems and reduce their cost. In this way, FPGAs offer several advantages as low-cost platform to deploy customized systems. However, the use of sub-micron technologies has increased their sensitivity to radiation-induced transient faults. Therefore, the mitigation of soft errors in systems based on soft-core microprocessors has become a major concern not only in the case of configuration memory protection, but also in the case of data and control-flow maintenance. Software-based fault tolerance techniques represent a valid alternative to improve the reliability in such systems at a reduced cost, but the associated time and memory overheads can limit their applicability. This chapter provides different implementation alternatives of software-based techniques in order to reduce overheads while keeping the reliability at the same level.

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Dokumentinformationen

Titel :

Overhead Reduction in Data-Flow Software-Based Fault Tolerance Techniques

Beteiligte:

Kastensmidt, Fernanda (Herausgeber:in) / Rech, Paolo (Herausgeber:in) / Chielle, Eduardo (Autor:in) / Kastensmidt, Fernanda Lima (Autor:in) / Cuenca-Asensi, Sergio (Autor:in)

Erschienen in:

FPGAs and Parallel Architectures for Aerospace Applications ; Kapitel : 18 ; 279-291

Erscheinungsdatum :

2016-01-01

Format / Umfang :

13 pages

ISBN :

978-3-319-14352-1 , 978-3-319-14351-4

DOI :

https://doi.org/10.1007/978-3-319-14352-1_18

Medientyp :

Aufsatz/Kapitel (Buch)