The design, development, and testing of FTMP hardware and software for use in advanced NASA vehicles are described in three previously published reports prepared for NASA. Consideration is given to the overall FTMP architecture; the system bus; the regional design and operation of processor, slave, clock-generation, and power systems; and the FTMP executive, facilities, acceptance-test/diagnostic, applications, and support softwar. Also included are a summary of test procedures and results and an executive summary characterizing the system, the reliability and availability models, and the overall performance.


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    Titel :

    Development and evaluation of a fault-tolerant multiprocessor (FTMP) computer


    Beteiligte:
    Smith, T. B., III (Autor:in) / Lala, J. H. (Autor:in)

    Erscheinungsdatum :

    1986-01-01


    Medientyp :

    Sonstige


    Format :

    Keine Angabe


    Sprache :

    Englisch


    Schlagwörter :


    The fault-tolerant multiprocessor computer

    Smith, T.B. | Tema Archiv | 1986


    A fault tolerant reconfigurable multiprocessor System

    Hamill, T.G. / Phillips, R. | Tema Archiv | 1977


    Testing the bus guardian unit of the FTMP

    Jha, M. K. / Robinson, J. P. | NTRS | 1983



    Performance and economy of a fault-tolerant multiprocessor

    Jaynarayan, H.L. / Smith, C.J. | Tema Archiv | 1979